| MIL-STD-1750A: Military Standard Sixteen-Bit Computer Instruction Set Architecture | ||
|---|---|---|
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Addr
Mode Mnemonic Format/Opcode
8 4 4 16
D STUB RA,ADDR --------------------------------------
DX STUB RA,ADDR,RX | 9B | RA | RX | | ADDR |
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8 4 4 16
I SUBI RA,ADDR --------------------------------------
IX SUBI RA,ADDR,RX | 9D | RA | RX | | ADDR |
--------------------------------------
Description. The LSH (lower byte) of register RA is stored into the MSH (upper byte) of the Derived Address, DA. The LSH (lower byte) of the DA is unchanged.
Register Transfer Description.
[DA]0-7 <-- (RA)8-15;
Registers Affected. None