| MIL-STD-1750A: Military Standard Sixteen-Bit Computer Instruction Set Architecture | ||
|---|---|---|
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Addr
Mode Mnemonic Format/Opcode
8 4 4 16
D STLB RA,ADDR --------------------------------------
DX STLB RA,ADDR,RX | 9C | RA | RX | | ADDR |
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8 4 4 16
I SLBI RA,ADDR --------------------------------------
IX SLBI RA,ADDR,RX | 9E | RA | RX | | ADDR |
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Description. The LSH (lower byte) of register RA is stored into the LSH (lower byte) of the Derived Address, DA. The MSH (upper byte) of the DA is unchanged.
Register Transfer Description.
[DA]8-15 <-- (RA)8-15;
Registers Affected. None