| MIL-STD-1750A: Military Standard Sixteen-Bit Computer Instruction Set Architecture | ||
|---|---|---|
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Addr
Mode Mnemonic Format/Opcode
8 4 4
----------------------
S POPM RA,RB | 8F | RA | RB |
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Description. For RA < RB, registers RA through RB are loaded sequentially from a stack in memory using R15 as the stack pointer. For RA >= RB, registers RA through R14 and then R0 through RB are loaded sequentially from the stack.
In both cases,
as each word is popped from the stack, R15 is incremented by one;
if R15 is included in the transfer, then it is effectively ignored;
on completion, R15 points to the top word of the stack remaining.
Register Transfer Description.
if RA <= RB then
for i = 0 thru RB - RA do
begin
if RA + i /= 15 then (RA + i) <-- [(R15)];
(R15) <-- (R15) + 1;
end;
else
begin
for i = 0 thru 15 - RA do
begin
if RA + i /= 15 then (RA + i) <-- [(R15)];
(R15) <-- (R15) + 1;
end;
for i = 0 thru RB do
begin
(i) <-- [(R15)];
(R15) <-- (R15) + 1;
end;
end;
Registers Affected. RA through R14, R0 through RB, R15