Getting Started with M68K Ada: Ada 95 Compilation System for the Motorola M68000 Family
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B.7. Opcodes

B.7.1. Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instructions that reach the target. Generally these mnemonics are made by substituting j for b at the start of a Motorola mnemonic.

The following table summarizes the pseudo-operations.

Table B-1. Assembler Pseudo Operations

 Displacement
Pseudo-OpBYTEWORD68020 LONG68000/10 LONGnon-PC relative
jbsrbsrbsrwbsrljsrjsr
jrabrasbrabraljmpjmp
jXX[a]bXXsbXXbXXlbNXs; jmplbNXs; jmp
dbXX[a]dbXXsdbXXdbXX; bra; jmpl
fjXX[a]fbXXwfbXXwfbXXlN/AfbNXw; jmp
Notes:
a. XX: condition, NX: negative of condition, see full description below.

jbsr, jra

These are the simplest jump pseudo-operations; they always map to one particular machine instruction, depending on the displacement to the branch target.

jXX

Here, jXX stands for an entire family of pseudo-operations, where XX is a conditional branch or condition-code test. The full list of pseudo-ops in this family is:

jhijlsjccjcsjnejeqjvcjvs
jpljmijgejltjgtjle  

For the cases of non-PC relative displacements and long displacements on the 68000 or 68010, the Assembler issues a longer code fragment in terms of NX, the opposite condition to XX. For example, for the non-PC relative case: 

jXX foo

gives

bNXs .L1
        jmp foo
.L1:

dbXX

The full family of pseudo-operations covered here is:

dbhidblsdbccdbcsdbnedbeqdbvcdbvs
dbpldbmidbgedbltdbgtdbledbfdbra
dbt       

Other than for word and byte displacements, when the source reads dbXX foo, the Assembler emits 

dbXX .L1
        bra .L2
.L1:    jmpl foo
.L2:

fjXX

This family includes the following:

fjnefjeqfjgefjltfjgtfjlefjffjt
fjglfjglefjngefjnglfjnglefjngtfjnlefjnlt
fjogefjoglfjogtfjolefjoltfjorfjseqfjsf
fjsnefjstfjueqfjugefjugtfjulefjultfjun

For branch targets that are not PC relative, the Assembler emits: 

fbNX .L1
        jmp foo
.L1:

when it encounters fjXX foo.

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