5.58. Double Precision Absolute Value of Register


Addr
Mode  Mnemonic          Format/Opcode
                           8      4      4
                        ----------------------
R     DABS   RA,RB      |  A5  |  RA  |  RB  |
                        ----------------------

Description. If the sign bit of the double precision Derived Operand, DO (i.e., the sign bit of register (RB,RB+1)), is a one, its negative or 2's complement is stored into register RA and RA+1, such that register RA contains the MSH of the result. However, if the sign bit of DO is a zero, it is stored, unchanged, into RA and RA+1. The condition status, CS, is set based on the result in register RA and RA+1.

Note: RA may equal RB.

Note: The absolute value of a number with a 1 in the sign bit and all other bits zero is the same word, and causes fixed point overflow to occur.

Register Transfer Description.

(RA, RA+1) <-- |DO|;
PI4 <-- 1, exit, if DO = 8000 0000 16;
(CS) <-- 0001  if (RA,RA+1) = 8000 0000 16;
(CS) <-- 0010  if (RA,RA+1) = 0;
(CS) <-- 0100  if (RA,RA+1) > 0;



Registers Affected. RA, RA+1, CS, PI