| MIL-STD-1750A: Military Standard Sixteen-Bit Computer Instruction Set Architecture | ||
|---|---|---|
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Addr
Mode Mnemonic Format/Opcode
8 4 4 16
D SRM RA,ADDR --------------------------------------
DX SRM RA,ADDR,RX | 97 | RA | RX | | ADDR |
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Description. The contents of register RA are stored into the Derived Address, DA, through the mask in register RA+1. For each position in the mask that is a one, the corresponding bit of register RA is stored into the corresponding bit of the DA. For each position in the mask that is a zero no change is made to the corresponding bit stored in the DA.
Register Transfer Description.
[DA] <-- {[DA] ^ ~(RA+1)} v {[RA] ^ [RA+1]};
(RA+1) = MASK, (RA) = DATA;
or, equivalently,
(RQ) <-- [DA];
(RQ)i <-- (RA)i if (RA+1)
i = 1 for i = 0, 1, ..., 15;
[DA] <-- (RQ);
Registers Affected. None