A register in the arithmetic logic unit used for intermediate storage, algebraic sums and other arithmetic and logical results.
A number which identifies a location in memory where information is stored.
That portion of hardware in the central processing unit in which arithmetic and logical operations are performed.
All the electronic and electro-mechanical systems and subsystems (hardware and software) installed in an aircraft or attached to it. Avionics systems interact with the crew or other aircraft systems in these functional areas: communications, navigation, weapons delivery, identification, instrumentation, electronic warfare, reconnaissance, flight control, engine control, power distribution, and support equipment.
Any general register used to provide the base address portion of the derived address for instructions using the base relative or base relative-indexed addressing modes.
Contraction of binary digit; may be either zero or one. In information theory, a binary digit is equal to one binary decision or the designation of one of two possible values or states of anything used to store or convey information.
A group of eight binary digits.
That portion of a computer that controls and performs the execution of instructions.
That portion of hardware in the CPU that directs sequence of operations, interprets coded instructions, and initiates proper commands to other parts of the computer.
A register that may be used for arithmetic and logical operations, indexing, shifting, input, output, and general storage of temporary data.
A register that contains a quantity for modification of an address without permanently modifying the address.
That portion of a computer which interfaces to the external world.
A program code which tells the computer what to do.
A register in the CPU that holds the address of the next instruction to be executed.
The attributes of a digital computer as seen by a machine (assembly) language programmer. ISA includes the processor and input/output instruction sets, their formats, operation codes, and addressing modes; memory management and partitioning if accessible to the machine language programmer; the speed of accessible clocks; interrupt structure; and the manner of use and format of all registers and memory locations that may be directly manipulated or tested by a machine language program. This definition excludes the time or speed of any operation, internal computer partitioning, electrical and physical organization, circuits and components of the computer, manufacturing technology, memory organization, memory cycle time, and memory bus widths.
A special control signal that suspends the normal flow of the processor operations and allows the processor to respond to a logically unrelated or unpredictable event.
That portion of a computer that holds data and instructions and from which they can be accessed at a later time.
That part of an instruction that defines the machine operation to be performed.
That part of an instruction that specifies the address of the source, the address of the destination, or the data itself on which the processor is to operate.
A register which is used to supply additional address bits in paged memory addressing schemes.
A type of I/O channel that allows program control of information transfer between the computer and an external device.
A device in the CPU for the temporary storage of one or more words to facilitate arithmetical, logical, or transfer operations.
A language used to describe operations (upon registers) which are caused by the execution of each instruction.
Must not be used.
A framework for usage is defined by the standard with particulars to be defined by the application requirements.
A sequence of memory locations in which data may be stored and retrieved on a last-in-first-out (LIFO) basis.
A register that points to the last item on the stack.
A register whose state is defined by some prior event occurrence in the computer.
Sixteen bits.